This section discusses a selection of findings based on the analysis of data from SEMI, TechInsights and desk research. These findings should be interpreted with some caution, in view of the data limitations described above. The results in this section provide insights into the global semiconductor value chain, identify market dynamics and analyse the geographic distribution of production.
The chip landscape
Geographical distribution of wafer fabrication capacity
Figure 1 shows the geographic distribution of in-production wafer capacity (excluding capacity from upcoming fabs) in seven ranges of node densities (see Box 1 for a detailed description of node density ranges) for the five economies with the highest in-production wafer capacity, namely China, Chinese Taipei, Korea, Japan and the United States.1 As of September 2025, these five economies together account for 87% of global in-production wafer capacity.
Figure 1 illustrates how the mix of process nodes differs by economy. For example, Korea’s wafer capacity is highly focused, with almost 80% of its capacity stemming from process nodes between 6 and smaller than 22nm. This focus is primarily due to SK Hynix and Samsung, Korea’s largest semiconductor suppliers, which are heavily invested in memory chip production that relies on constant node upgrades. Since most of today’s NAND and DRAM production depends on process nodes ranging from 6nm to <22nm, it explains why Korea’s wafer capacity is so focused. In contrast, the United States’ wafer capacity is much less focused on specific nodes but rather diversified across a wide range of process nodes.
The seven ranges used in the analysis are based on several factors, such as coverage of at least 2 full-nodes (see Note), changes in transistor architecture and dependence on advanced lithography equipment. The following is a brief overview of the seven node density ranges.
<6nm: In order to build a 5nm and smaller process node, a fab requires access to extreme ultra-violet (EUV) lithography equipment. 3, 4 and 5nm nodes are currently used to produce cutting-edge mobile system-on-a-chip (SoCs), cloud AI accelerators for machine learning and high-performance processors in consumer devices and servers.
6 to <22nm: This includes two full-nodes (10nm and 14/16nm) and two half-nodes (7nm and 12nm). For process nodes smaller than 22nm, the transistor architecture must be changed from planar transistors to FinFETs, making chip design and the production process more complex and costly (Lapedus, 2018[9]). Today, most of the wafer capacity in this range comes from memory chip fabs producing DRAM and NAND.
22nm to <45nm: This range includes two full-nodes (22nm and 32nm) and two half-nodes (28nm and 40nm). These are very popular process nodes for a variety of chips, such as microcontrollers. A lot of capacity, especially in China, is expected to come online in this range of process nodes over the next few years (Goujon, Kleinhans and Gormley, 2024[10]). Process nodes at 40nm and smaller depend on argon-fluoride immersion lithography (ArFi) equipment.
45nm to <90nm: This range consists of two full-nodes (45nm and 65nm) and two half-nodes (55nm and 80nm). Process nodes in this range are crucial for radio frequency and mixed-signal chips, as well as microcontrollers and embedded (specialty) memory.
90nm to <180nm: This includes the full-nodes 90nm and 130nm and the half-nodes 110nm and 150nm. These are popular process nodes for power management ICs, mixed-signal chips and analog semiconductors.
180 to <300nm: This includes the full-nodes 180nm and 250nm as well as the half-node 220nm. These process technologies are still very relevant for (discrete) power semiconductors and analog chips.
Note: “Full-nodes” represent significant advancements in semiconductor technology with substantial reductions in feature size and major process changes, such as the jump from 45nm to 32nm. “Half-nodes” are intermediate steps that offer smaller, incremental improvements, for example 28nm between 32nm and 22nm. However, this characterisation lost meaning for node densities under 14/16nm, as scaling became more about architectural innovations (e.g., FinFETs) and marketing decisions rather than straightforward geometric reductions.
The ten largest semiconductor companies in terms of production capacity, account for around 50% of WSPM globally. Figure 2 provides insights on the firm distribution in the largest nine semiconductor producing economies. In Japan, 73 companies operate at least one fab, with a combined wafer capacity of more than five million WSPM. The five companies with the largest wafer capacity in Japan, namely Kioxia, Sony, Toshiba, Micron, and Renesas, account for above three million WSPM (58% of Japan’s total). The remaining 42% of Japan’s wafer capacity is provided by the other 68 companies operating fabs in the economy. Wafer production is more concentrated in other economies, such as Korea, Chinese Taipei, Singapore and Germany. China is the only economy where the five companies with the highest wafer capacity represent less than half of the economy’s total wafer capacity.
Note: Company share is measured by in-production capacity, in million (M) WSPM in 8’’ equivalents. The figure shows data for the nine largest economies in terms of in-production capacity. The light grey bar represents the capacity share of the top five companies (with the largest wafer capacity) and corresponds to the left-hand scale (LHS). The dark grey bar shows the capacity share of the rest of the market and also corresponds to the left-hand scale (LHS). The black dot indicates the number of companies operating fabs in each economy and corresponds to the right-hand scale (RHS). Companies are identified based on the location of the production facilities (not headquarters), thus the same company may appear in multiple economies. The top five companies are listed in descending order of wafer capacity at the bottom of the figure.
Figure 3 shows the capacity of planned, under construction and in-production fabs located in the economies with highest capacity. Most of the capacity investments (both green- and brownfield fab projects) are taking place in the largest semiconductor producing economies and is driven mostly by the largest semiconductor companies operating fabs in the corresponding region. The largest increase in capacity (WSPM) is upcoming in the United States, China, Korea, Chinese Taipei, Japan, Germany, and Singapore. India accounts for the largest share in upcoming capacity among the rest of the world (RoW).
Note: The figure shows total in-production and upcoming capacity, measured in million (M) WSPM in 8’’ equivalents, for the economies with largest capacity. Rest of World (RoW) aggregates all economies in the dataset not otherwise listed in the chart. The companies accounting for the increase in capacity due to upcoming fabs are included in the light blue box at the bottom, with the percentage of their contribution to the total upcoming capacity is also included in the figure. The percentage on top of each bar denotes the share of upcoming capacity based on the economy’s in-production capacity.
Figure 3 also shows that more than 60% of planned capacity expansions in each of the economies stems from less than six companies per economy. For example, more than 90% of planned capacity expansions (WSPM) in the United States come from Micron, Texas Instruments (TI), TSMC, Intel, and Samsung, in descending order of upcoming capacity expansions.
While the largest semiconductor producing economies are expected to see their capacity increase, it is important to highlight considerable differences across process technologies and chip type capabilities. Upcoming capacity developments in geographic regions and economies can be analysed through product types and business models to better understand how the chip landscape is forecasted to evolve over the next years.
Node density (nanometres) alone is not a meaningful metric for assessing the geographic distribution of wafer capacity. Process technologies (chip types) and business models (i.e. fabs operated by foundries or IDMs) have to be taken into account as well. When examining the geographic distribution of wafer capacity based on the types of chips a fab is capable to produce, substantial differences emerge.
Importantly, in the following Figure 4 and Figure 5, fabs may be counted multiple times because each panel reflects their distinct “capabilities”. For example, a single fab from Tower Semiconductor might offer Bipolar-CMOS-DMOS (BCD) process technology for power semiconductors, radio frequency silicon-on-insulator (RF SOI) for analog RF chips, and non-volatile specialty memory (NVM). Thus, this fab would be included in the wafer capacity totals for three different categories – analog, power/discrete and specialty memory – in a given economy. Furthermore, within each category, the fab’s entire wafer capacity would be counted. For instance, if a fab with 40 thousand WSPM offers process technologies for both analog semiconductors and specialty memory chips, the fab’s total capacity will be counted twice – once for analog and once for specialty memory (see section 2 for explanation).
Thus, Figure 4 and Figure 5 have several limitations, and the data should be interpreted with caution. As indicated earlier, this analysis heavily relies on the completeness, correctness and accuracy of the underlying data regarding process technologies. The information presented in Figure 4 and Figure 6 can entail important biases if available data do not accurately and comprehensively represent the variety of process technologies offered in a specific fab – see 4Annex B for a discussion of process technology offerings per technology node. Given the variety of process technologies per fab and process node, data are likely incomplete. Therefore, the geographic distribution of capacity shares per chip type should be viewed as rough indicators rather than definitive assessments.
Select economies with highest wafer capacity per chip type
The six panels in Figure 4 show the total wafer capacity (WSPM) for six different types of chips, namely power and discrete; analog; mature logic (>=20nm); advanced logic (<20nm); commodity memory (DRAM and NAND)2; and specialty memory.3 These distinctions between types of logic chips and types of memory chips are used solely for the purpose of the analysis in this paper. The Network is welcome to provide guidance on how best to distinguish these types of chips.4
For each of these types of chips, Figure 4 shows the five economies with the highest total wafer capacity, based on the geographical location of the fabs rather than the headquarter location of the companies. The darker shade denotes the in-production capacity, the lighter shade shows upcoming (under construction and planned) capacity.
Note: Each panel shows an economy’s total wafer capacity for different types of chips (based on different process technologies), measured in million (M) WSPM in 8’’ equivalents. The dark shade corresponds to the capacity accounted for by the in-production fabs while the light shade reflects upcoming fabs in each of the economy.
China and Chinese Taipei are the only economies that feature in the top five largest chip producers across all six chip types. The United States and Japan follow, appearing in the top five for all chip types except commodity memory and advanced logic, respectively. However, if all upcoming commodity memory fabs in the United States come to fruition, the United States would also rank among the top five economies for all six chip types. Korea and Singapore are also important players in several types of chips.
Production capacity for power/discrete chips is led by China, with 6.28 million WSPM, followed by Chinese Taipei with 2.42million WSPM and Japan with 1.60 million WSPM. China also has the largest total capacity for analog chips, with 3.64 million WSPM, followed closely by Chinese Taipei (2.09 million WSPM) and the United States (1.90 million WSPM).
In logic chip types, in-production capacity in mature nodes is led by China (4.23 million WSPM), followed by Chinese Taipei (2.48 million WSPM) and Japan (1.24 million WSPM). For advanced logic chips, Chinese Taipei leads (1.55 million WSPM), followed by the United States (0.84 million WSPM) and China (0.39 million WSPM).
In memory chip types, Korea has the highest wafer in-production capacity for commodity memory (DRAM and NAND) by a significant margin, which is not the case for specialty memory, such as NOR Flash. Korea leads on commodity memory capacity (4.58 million WSPM), followed by China (2.37 million WSPM and Japan (2.21 million WSPM). In specialty memory, Chinese Taipei (1.18 million WSPM) is closely followed by China (0.92 million WSPM) and the United States (0.67 million WSPM).
Select economies with highest upcoming capacity expansions per chip type
Upcoming expansions of capacity are not evenly distributed across chip types and economies. Figure 5 provides a more granular view of upcoming wafer capacity by chip type and economy to better assess differences between economies. For certain chip types, such as commodity memory and advanced logic, the upcoming capacity is mainly in the economies with largest in-production capacity. Meanwhile, the upcoming capacity for power, analog, mature logic, and specialty memory chips is taking place in several other economies as well, even if it would not amount to significant changes in the list of top five economies with highest capacity. Substantial capacity additions in all six different chip type categories can only be observed in China and the United States. Capacity developments in other economies are much more focused on specific types of chips.
Upcoming capacity for power chips is taking place mostly in China, with additional 0.48 million WSPM, followed by Germany (0.32 million WSPM) and Japan (0.19 million WSPM). If these upcoming capacity expansions come into production, the top five economies with largest power chip capacity would be China, Chinese Taipei, Japan, Germany, and the United States respectively.
For analog chips, the upcoming capacity is led by the United States with an additional 0.64 million WSPM, followed by China (0.57 million WSPM) and then Germany (0.27 million WSPM). Should the production capacity underway materialise, the leading economies with the highest analog chip production capacity would be China, the United States, Chinese Taipei, Japan and Germany.
For mature logic chips, the upcoming capacity would be largely focused on China. Companies in China would build out more than three times the combined upcoming wafer capacity (0.81 million WSPM) of the other top six economies in Figure 5: capacity expansions from Japan (0.18 million WSPM) and Germany (0.09 million WSPM), amount to 0.27 million WSPM. Based on the data analysed, Chinese Taipei, United States, and Korea do not have upcoming mature logic wafer capacity. This would correspond to China, Chinese Taipei, Japan, the United States, and Singapore being the leading economies with the highest capacity in mature logic chips.
For advanced logic chips, the increase in capacity would be mainly in the United States with additional 0.62 million WSPM, followed closely by Chinese Taipei (0.47 million WSPM). Thus, the United States and Chinese Taipei together would build out twice the capacity (1.09 million WSPM) of the of the other top-six economies in Figure 5 combined (0.52M WSPM). This would lead to a list of the largest top five advanced logic chip producing economies led by Chinese Taipei, the United States, Korea, China, and Japan.
In commodity memory chips, the highest increase in capacity would take place in Korea with additional 2.36 million WSPM, more commodity memory capacity than the other five economies combined. USA (1.71 million WSPM) and China (0.38 million WSPM) are poised to build out the second and third most commodity memory capacity, respectively. Should these capacity developments materialise, Korea, China, Japan, Chinese Taipei, and the United States would be the largest commodity memory chip producing economies.
For specialty memory chips, the upcoming capacity is focused on United States (0.074 million WSPM) and Chinese Taipei (0.057 million WSPM). The top five economies with the highest specialty memory capacity would be Chinese Taipei, China, the United States, Japan, and Singapore.
Note: The figure displays upcoming capacity, measured in million (M) WSPM in 8’’ equivalents, disaggregated by chip types for the six economies with the highest projected upcoming capacity values in descending order.
Fabs with mixed manufacturing capabilities (process technologies)
Most fabs can manufacture more than one type of chip, which makes it challenging to analyse the geographic distribution of wafer capacity based on the types of chips a fab is capable to produce. Moreover, uneven coverage of the dataset means that there are fabs that are not attributed to any of the chip type categories. Figure 6 illustrates the heterogeneous nature of chip manufacturing, with the exclusion of 375 unattributed fabs in the OECD production database. The figure highlights the overlaps in chip types for fabs in addition to the exclusive fabs of the particular chip type categorisation. As fabs have heterogeneous capabilities, one fab can produce more than one type of chip. However, there are some fabs only producing one chip type.
Specialty memory: NOR Flash and other types of specialty memory are produced in low volumes, compared to the other five types of chip categories in the dataset (see Figure 4). Out of the 72 fabs in the dataset capable to produce specialty memory only one fab produces just specialty memory chips. Around 12% of fabs capable to produce specialty memory also produce commodity memory. More than 80% of fabs capable to manufacture specialty memory also manufacture analog, power or mature logic chips.
Mature logic: Out of the 244 fabs in the dataset capable to produce mature logic chips (>=20nm) around 25% are exclusively producing mature logic chips and no other type. However, roughly 40% of the fabs is also capable to produce analog and power semiconductors. Around 75% of fabs in the dataset are producing mature logic chips in combination with any other type.
Analog: Similar to fabs producing mature logic chips, only 27% of the 345 analog fabs are exclusively producing analog chips. Most fabs capable to manufacture analog chips can also produce power semiconductors or mature logic chips.
Power: Out of the fabs in the dataset, 475 can produce power semiconductors. More than half of those 475 fabs (256 fabs) are only producing power semiconductors. This is in contrast to specialty memory, mature logic and analog chips that are typically produced by “mixed capabilities” fabs.
Commodity memory: Of the 79 fabs in the dataset capable of producing commodity memory chips, such as NAND and DRAM, more than 88% are not producing any other type of chip. Typically, commodity memory chips are not produced by fabs with mixed capabilities.
Advanced logic: Almost all (96%) of the 48 fabs capable of producing advanced logic chips (<20nm) in the dataset are exclusively producing advanced logic chip.
In conclusion, analog, mature logic and specialty memory chips are predominantly produced by fabs that offer a variety of process technologies, enabling them to produce these different types of chips. However, for power semiconductors, exclusive manufacturing is much more common – around half of power semiconductor fabs in the dataset only produce this type of chips. Commodity memory fabs and advanced logic fabs are highly specialised and are generally not capable of producing other types of chips.
This prevalence of “mixed-capability” fabs, especially in mature logic and analog chips, also poses challenges in assessing capacity across different markets since these fabs are not limited to manufacturing a specific type of chip – in contrast to advanced logic and commodity memory fabs. They often seem to offer a broad variety of process technologies, allowing them to shift production and product mix depending on how the market develops. This is one of the reasons making it challenging to assess whether or not excess wafer capacity exists in, for example, mature logic chip production.
Note: Grey highlights the percentage of total fabs in one chip type category that exclusively produce that particular chip type. Most commonly occurring overlaps among the chip types are presented with the various shades of green where the darkest shade represents the share of fabs producing a mix of chip types not listed otherwise. R&D and pilot lines are excluded. 375 fabs are unattributed to any chip type category and thus also omitted, 810 unique in-production fabs included in the figure.
Average fab size per chip type
Lastly, assessing wafer capacity by chip type also provides insights into the different sizes of fabs. Figure 7 reveals that, on average, fabs substantially differ in size (measured in WSPM in 8” equivalents) depending on the type of chip they are producing. While the average fab size for power, analog and mature logic chips ranges between 30 thousand to 50 thousand WSPM, advanced logic and especially commodity memory fabs are substantially larger in their manufacturing volumes. For example, several of the upcoming 12-inch commodity memory fabs from Samsung, SK Hynix and Micron are planned with a wafer capacity of 150 to 200 thousand WSPM, corresponding to 330 to 450 thousand WSPM in 8” equivalents.
Given increasing capital expenditures for commodity memory and advanced logic fabs, mainly driven by more complex and thus more expensive manufacturing equipment, the average size of fabs for these chip types is also increasing to benefit from economies of scale. This is illustrated by the much larger average size of advanced logic fabs (72 thousand WSPM) compared to mature logic fabs (47 thousand WSPM).
Note: The figure shows average in-production capacity per fab for six chip types measured in thousands (K) WSPM in 8’’ equivalents on the left-hand scale (LHS) and total number of fabs for each chip type category on the right-hand scale (RHS). The share of capacity for each of the product type is not mutually exclusive as one fab can fabricate more than one type of chip type. R&D and pilot lines are excluded. 375 fabs are unattributed to any chip type category and thus also omitted, 810 unique in-production fabs included in the figure.
While the previous section focused on various insights in relation to the process technologies and corresponding chip types fabs offer, this section looks at business models and company ownership. Figure 8 details the wafer fabrication capacity in each economy, distinguishing between fabs owned by domestic and foreign companies. Data clearly show that, in the five economies with the largest wafer capacity, most of the production capacity belongs to domestically owned companies.
While the global semiconductor value chain is transnationally highly interdependent, most of the capacity is in companies operating in their own jurisdiction (Baisakova and Kleinhans, 2020[11]). One possible explanation is the familiarity with the local regulatory framework and ecosystem: building a fab is capital-intensive, requires access to highly specialised construction companies, technology and infrastructure suppliers while navigating complex regulatory environments (European Commission, 2022[12]).
Nevertheless, recent developments suggest that the share of foreign owned companies operating fabs may increase in some of the largest semiconductor producing economies. For example, TSMC (Chinese Taipei) and Samsung (Korea) are expanding their wafer capacity in the United States and Japan (Moriyasu, Fang-Ting and Li, 2024[13]; Moriyasu et al., 2024[14]). In many smaller semiconductor producing economies, such as Singapore, Malaysia, Austria and Ireland, most wafer capacity has been developed by foreign companies. Singapore and Malaysia have been notably successful in attracting fab investments from foreign owned companies.
Importantly, ownership structures in the semiconductor industry can be rather complicated and are not meticulously tracked by commercial datasets. As one example, STMicroelectronics is incorporated in the Netherlands, is legally headquartered in Switzerland and has fabs in Singapore, France and Italy (in descending order of wafer capacity as of September 2024). However, most of the commercial datasets categorise it as a Swiss or Italian company. The OECD plans to improve the tracking of ownership, headquarter and production locations in the Semiconductor Production Database going forward.
Note: The left-hand scale (LHS) measures an economy’s in-production capacity, measured in million (M) WSPM in 8’’ equivalents – the pink bar shows wafer capacity controlled by domestically owned (dark pink) and foreign owned (light pink) companies. The right-hand scale (RHS) measures the number of domestically (dark blue) versus foreign owned (light blue) companies operating fabs (at least one) in an economy.
Business models for semiconductor fabrication are also evolving. While a fab is normally operated by either a pure-play foundry or an IDM, some IDMs (e.g. Intel, Samsung) adapted their business model to also offer foundry services in some or all their fabs (known as “IDM-foundries”). Business model is therefore another important consideration, when analysing the geographic distribution of wafer capacity. The analysis in this section distinguishes between i) IDM capacity, ii) pure-play foundry capacity and iii) IDM-foundry capacity.5
Foundry capacity allows for supplying the entire market. Any company designing a chip can use the fabs of a foundry, whereas the wafer capacity of a fab operated by an IDM only serves the IDM’s internal business consumption.6 With the rise of application specific chips designed and optimised for specific purposes, an increasing number of fabless and system companies are designing their own chips, thus driving increasing demand for foundry capacity (Thompson and Spanuth, 2021[15]). It is therefore crucial to assess the balance between IDM capacity on the one hand and foundry or IDM-foundry on the other for different geographies.
Figure 9 presents wafer capacity data (in WSPM 8-inch EQ) from the top 50 semiconductor manufacturing companies, covering 82% of the total global wafer capacity. The categorisation of IDM, IDM-foundry, and pure-play foundry is based on the operational model of each fab, and the wafer capacity is assigned to the economy where each fab is physically situated, not where the companies are headquartered. The Secretariat will continue efforts to enhance data quality and accuracy, including on the categorisation according to business model.
Figure 9 shows that most of the global foundry capacity is in China and Chinese Taipei. China and Chinese Taipei are also the only economies where more than 50% of the domestic wafer capacity comes from foundries and not IDMs.
The relative share of IDM to foundry capacity (including IDM-foundries) per economy is likely to shift, especially for economies such as Japan and the United States, in view of planned wafer capacity by IDM- and pure-play foundries. However, taking the United States as an example, even with the increased investments by IDM-foundries, more than half of the total capacity within the United States would remain IDM capacity.
The stark difference in business models by economy can be explained both historically and by chip types. For example, commodity memory chips are solely produced by IDMs which explains why Korea has very little pure-play foundry capacity – the two largest semiconductor companies in Korea, Samsung and SK Hynix, are IDMs focused on commodity memory and logic chips. Another example would be Japan’s semiconductor ecosystem that is also dominated by IDMs.
Importantly, Figure 9 is not exhaustive since the underlying data consist only of the 50 companies with highest wafer capacity, accounting for 82% of global wafer capacity. For example, several Chinese IDMs are planning to expand manufacturing capacity, but they are not included in the dataset. In future updates of the dataset the number of companies with verified business models (IDM, IDM-Foundry, Pure-Play Foundry) will be steadily expanded to improve the quality of the data.
Note: The data are based on the top 50 semiconductor manufacturing companies globally, representing 82% of total global wafer capacity. The figure shows in-production and upcoming capacity, measured in million (M) WSPM in 8’’ equivalents for seven economies, categorised by the business model of the fab. The business models included are pure-play foundries (panel a), foundries operated by IDMs (panel b), and IDM (panel c). The shade ranges from darkest to lightest colour indicates the status of the fabs from currently in-production, under construction and planned, respectively.
← 1. When treated as a single economy for the purposes of this assessment, the EU27 would hold the sixth position worldwide in wafer manufacturing capacity, with approximately 2 million WSPM, just above that of Singapore.
← 2. DRAM (Dynamic Random-Access Memory) is a type of volatile memory is commonly used in computers and servers for temporary data storage, whereas NAND Flash is a non-volatile memory used for long-term data storage due to its ability to retain data without power — see the OECD semiconductor taxonomy (OECD, 2024[1]) for additional details.
← 3. Specialty memory refers to memory types designed for specific applications and use cases, often prioritising attributes like durability, speed, or power efficiency. Unlike standard memory like DRAM or NAND, specialty memory includes technologies such as NOR Flash, MRAM, and ReRAM, which are tailored for tasks in industries like automotive, industrial, and IoT, where specific performance characteristics are essential.
← 4. The discussions of the Semiconductor Informal Exchange Network on the categorization of chip types will help inform a future revision of the OECD taxonomy (OECD, 2024[1]).
← 5. For example, Samsung, as an IDM-foundry, operates memory fabs (DRAM and NAND) as an IDM in Korea and China. Samsung also operates fabs as an IDM-foundry for contract manufacturing in Korea and the United States.
← 6. Some types of chips, such as commodity memory, are only produced in an IDM setting since competition heavily relies on economies of scale.