This paper was written by Jan-Peter Kleinhans and Sabhyata Jha of the Directorate for Science Technology and Innovation (STI). It benefited from the valuable insights, comments, and inputs of Guy Lalanne, Lea Samek, and Filipe Silva. The authors gratefully acknowledge feedback provided by the Semiconductor Informal Exchange Network participants as well as Audrey Plonk and Gallia Daor in earlier versions of this document. The authors also thank Anaisa Goncalves, Andreia Furtado and Shai Somek for their support.
The chip landscape
Geographical distribution of wafer fabrication capacity